OBJECTIVES:
1.
Expose the CET 3116 student to the new Digital Programmable Devices Technology such as Read Only Memories (ROM), Programmable Logic Arrays
(PLA), Complex Programmable Device (CPLD) and Field Programmable Gate
Array (FPGA).
2.
Provide the CET 3116 student with the opportunity of familiarizing with the modern
methodologies of Digital Design and the Automated Digital Design Environment.
3.
Allow student to gain experience with the automated tools for design and
implementation of real circuits.
DESCRIPTION
This project is an individual assignment. Students will work with the web edition Altera Quartus® version 14.1 II CAD system. The system can be downloaded for free from https://www.intel.com/content/www/us/en/programmable/downloads/download-center.html
You need to design and simulate an improved version of the burglar alarm reviewed in class.
Altera Quartus® II CAD system will be used in the subsequent course projects.
GUIDELINES:
1.
Each student will turn in a report with the results of their design and simulation of the circuits. The report should contain:
i.
A brief description of the project with circuit layout (schematics), the
waveform resulting from the time simulation, and your analysis, including
expressions, Karnaugh maps, comments and conclusions.
ii.
You will use only functional simulation.
iii.
Discussion in how you would implement the circuit in real life and under
which considerations.
iv.
Attached and upload separately the Quartus II files: bdf, vwf, qpf. Each
project will be compiled and simulated by the instructor. Note: keep in
mind that if you submit any outcome not originated by your design, you
will not get any credit for the project which considerations.
2.
To download the Altera Quartus® II CAD system follow the directions given in the document Quartusinst.doc. You need to use your Daytona state College e-mail and create your Altera account. Just follow the instructions on how to get the license file and installation.
3.
Once Altera Quartus® II CAD system is installed watch the videos on QUARTUS II and follow the tutorial Quartus II Introduction Using Schematic Designs. It will guide you on how to do the first part of the project and gain knowledge on how to use Quartus II. You will include snapshots of the resulting circuit and waveform obtained by you.
4.
Proceed with the design and implementation of an Enhanced Burglar Alarm that controls the security in a residence with 2 windows and one door. The circuits mustbe implemented
using only NAND gates (refer to section 7-3 in the book). Use as guideline the circuit discussed in the class (Combinatorial Circuits: Minimization Part I) and reviewed in the videos of Quartus II. You need to include snapshots of the circuit and the waveform.
5.
The project will be evaluated considering the following aspects:
i.
Result correctness.
ii.
Report completeness.
iii.
Clarity of ideas.
iv.
Bonus points implementing with ALTERA boards DE2-115.
OBJECTIVES: 1. Expose the CET 3116 student to the new Digital Programmable Devic
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